Freescale Semiconductor /MKL28T7_CORE1 /LPI2C0 /MCCR1

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Interpret as MCCR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CLKLO0CLKHI0SETHOLD0DATAVD

Description

Master Clock Configuration Register 1

Fields

CLKLO

Clock Low Period

CLKHI

Clock High Period

SETHOLD

Setup Hold Delay

DATAVD

Data Valid Delay

Links

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